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» Models of Computation for Networks on Chip
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DAC
2000
ACM
14 years 9 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 9 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
SPDP
1991
IEEE
14 years 12 days ago
A decentralized task scheduling algorithm and its performance modeling for computer networks
A dynamic taskschedulingalgorithm,that isstable,decentralized,and adaptivetonetwork topology,ispresented. Theproposedalgorithmisanextensionofnearestneighbor loadbalancingstrategyw...
Ishfaq Ahmad, Arif Ghafoor, Kishan G. Mehrotra
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 2 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil