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MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
14 years 8 days ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
14 years 8 days ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
NANONET
2009
Springer
199views Chemistry» more  NANONET 2009»
13 years 12 months ago
Through Silicon Via-Based Grid for Thermal Control in 3D Chips
3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between...
José L. Ayala, Arvind Sridhar, Vinod Pangra...
SSD
2001
Springer
120views Database» more  SSD 2001»
13 years 11 months ago
On Multi-way Spatial Joins with Direction Predicates
Spatial joins are fundamental in spatial databases. Over the last decade, the primary focus of research has been on joins with the predicate “region intersection.” In modern da...
Hongjun Zhu, Jianwen Su, Oscar H. Ibarra
SI3D
1999
ACM
13 years 11 months ago
Interactive technical illustration
A rendering is an abstraction that favors, preserves, or even emphasizes some qualities while sacrificing, suppressing, or omitting other characteristics that are not the focus o...
Bruce Gooch, Peter-Pike J. Sloan, Amy Gooch, Peter...