6106 search results - page 920 / 1222 » Modes for Software Architectures |
139
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ISCA
2011
IEEE
14 years 8 months ago
2011
IEEE
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
131
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CIKM
2011
Springer
14 years 4 months ago
2011
Springer
Previous information extraction (IE) systems are typically organized as a pipeline architecture of separated stages which make independent local decisions. When the data grows bey...
148
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DAC
2011
ACM
14 years 4 months ago
2011
ACM
We present ChronOS Linux, a best-effort real-time Linux kernel for chip multiprocessors (CMPs). ChronOS addresses the intersection of three problem spaces: a) OS-support for obta...
335
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Presentation
Data-parallel architectures like SIMD (Single Instruction Multiple Data) or SIMT (Single Instruction Multiple Thread) have been adopted in many recent CPU and GPU architectures. Al...
116
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CAV
2012
Springer
13 years 7 months ago
2012
Springer
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...