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CODES
2005
IEEE
14 years 1 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
EUROPKI
2009
Springer
13 years 5 months ago
Automatic Generation of Sigma-Protocols
Efficient zero-knowledge proofs of knowledge (ZK-PoK) are basic building blocks of many cryptographic applications such as identification schemes, group signatures, and secure mult...
Endre Bangerter, Thomas Briner, Wilko Henecka, Ste...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
13 years 11 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
13 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
CORR
2006
Springer
152views Education» more  CORR 2006»
13 years 7 months ago
On Reduced Complexity Soft-Output MIMO ML detection
In multiple-input multiple-output (MIMO) fading channels maximum likelihood (ML) detection is desirable to achieve high performance, but its complexity grows exponentially with th...
Massimiliano Siti, Michael P. Fitz