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IEEEPACT
2009
IEEE
14 years 2 months ago
Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
Basilio B. Fraguela, Yevgen Voronenko, Markus P&uu...
WEBI
2007
Springer
14 years 1 months ago
Logic Programming to Address Issues of the Semantic Web
The size of the Web and its increase rate made it cumbersome to locate high precision results to a requested piece of information. The Semantic Web provides a framework and a set ...
Isambo Karali
APWEB
2005
Springer
14 years 1 months ago
An Incremental Subspace Learning Algorithm to Categorize Large Scale Text Data
The dramatic growth in the number and size of on-line information sources has fueled increasing research interest in the incremental subspace learning problem. In this paper, we pr...
Jun Yan, QianSheng Cheng, Qiang Yang, Benyu Zhang
MICRO
2002
IEEE
113views Hardware» more  MICRO 2002»
14 years 16 days ago
Vacuum packing: extracting hardware-detected program phases for post-link optimization
This paper presents Vacuum Packing, a new approach to profile-based program optimization. Instead of using traditional aggregate or summarized execution profile weights, this ap...
Ronald D. Barnes, Erik M. Nystrom, Matthew C. Mert...
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
13 years 12 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira