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» Multi-Million Gate FPGA Physical Design Challenges
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EDBT
2010
ACM
133views Database» more  EDBT 2010»
14 years 3 months ago
FPGAs: a new point in the database design space
In line with the insight that “one size” of databases will not fit all application needs [19], the database community is currently exploring various alternatives to commodity...
René Müller, Jens Teubner
DAC
2006
ACM
14 years 9 months ago
FLAW: FPGA lifetime awareness
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie,...
VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
14 years 9 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
14 years 2 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
SLIP
2009
ACM
14 years 3 months ago
Floorplan-based FPGA interconnect power estimation in DSP circuits
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic