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DSD
2010
IEEE
126views Hardware» more  DSD 2010»
13 years 8 months ago
Low Power FPGA Implementations of 256-bit Luffa Hash Function
Low power techniques in a FPGA implementation of the hash function called Luffa are presented in this paper. This hash function is under consideration for adoption as standard. Tw...
Paris Kitsos, Nicolas Sklavos, Athanassios N. Skod...
ICCD
1997
IEEE
87views Hardware» more  ICCD 1997»
13 years 12 months ago
Synthesizing Iterative Functions into Delay-Insensitive Tree Circuits
Speed, cost and correctness may be the most important factors in designing a digital system. This paper proposes a novel and general methodology to synthesize iterative functions ...
Fu-Chiung Cheng
ICSE
2009
IEEE-ACM
14 years 2 months ago
Mining exception-handling rules as sequence association rules
Programming languages such as Java and C++ provide exception-handling constructs to handle exception conditions. Applications are expected to handle these exception conditions and...
Suresh Thummalapenta, Tao Xie
ICC
2007
IEEE
141views Communications» more  ICC 2007»
14 years 2 months ago
A Hybrid Model to Detect Malicious Executables
— We present a hybrid data mining approach to detect malicious executables. In this approach we identify important features of the malicious and benign executables. These feature...
Mohammad M. Masud, Latifur Khan, Bhavani M. Thurai...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
14 years 1 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...