41 search results - page 4 / 9 » Multi-voltage floorplan design with optimal voltage assignme... |
CSE
2009
IEEE
13 years 11 months ago
2009
IEEE
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
ISPD
2009
ACM
14 years 3 months ago
2009
ACM
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
ISQED
2006
IEEE
14 years 2 months ago
2006
IEEE
Gate-length biasing is a runtime leakage reduction technique that leverages on the short-channel effect by marginally increasing the gate-length of MOS devices to significantly ...
CODES
2004
IEEE
14 years 8 days ago
2004
IEEE
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...