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ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 5 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
14 years 8 days ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
ISQED
2007
IEEE
141views Hardware» more  ISQED 2007»
14 years 2 months ago
OPC-Friendly Bus Driven Floorplanning
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. W...
ICCAD
2009
IEEE
161views Hardware» more  ICCAD 2009»
13 years 6 months ago
The epsilon-approximation to discrete VT assignment for leakage power minimization
As VLSI technology reaches 45nm technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, du...
Yujia Feng, Shiyan Hu
DAC
2010
ACM
14 years 13 days ago
PreDVS: preemptive dynamic voltage scaling for real-time systems using approximation scheme
System optimization techniques based on dynamic voltage scaling (DVS) are widely used with the aim of reducing processor energy consumption. Inter-task DVS assigns the same voltag...
Weixun Wang, Prabhat Mishra