Sciweavers

198 search results - page 6 / 40
» Multicore Devices: A New Generation of Reconfigurable Archit...
Sort
View
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 11 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 4 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
14 years 1 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
FPL
2004
Springer
99views Hardware» more  FPL 2004»
14 years 26 days ago
A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development
A novel configuration bitstream generation tool for a custom FPGA platform is presented. It can support a variety of devices of similar architecture. The tool exhibits technology i...
K. Siozios, George Koutroumpezis, Konstantinos Tat...
EVOW
2008
Springer
13 years 9 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek