395 search results - page 68 / 79 » Multilevel Circuit Partitioning |
122
Voted
ICCAD
2007
IEEE
15 years 11 months ago
2007
IEEE
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
97
Voted
ICCAD
2005
IEEE
15 years 11 months ago
2005
IEEE
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
126
Voted
ICCAD
2004
IEEE
15 years 11 months ago
2004
IEEE
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
152
click to vote
GLVLSI
2009
IEEE
15 years 9 months ago
2009
IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
141
click to vote
CASES
2006
ACM
15 years 8 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...