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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 1 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
ICPP
1993
IEEE
13 years 11 months ago
Meta-State Conversion
Abstract — In MIMD (Multiple Instruction stream, Multiple Data stream) execution, each processor has its own state. Although these states are generally considered to be independe...
Henry G. Dietz, G. Krishnamurthy
MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
13 years 11 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
MICRO
1993
IEEE
128views Hardware» more  MICRO 1993»
13 years 11 months ago
Techniques for extracting instruction level parallelism on MIMD architectures
Extensive research has been done on extracting parallelism from single instruction stream processors. This paper presents some results of our investigation into ways to modify MIM...
Gary S. Tyson, Matthew K. Farrens
FCCM
2003
IEEE
123views VLSI» more  FCCM 2003»
14 years 28 days ago
FPGA-based SIMD Processor
A massively parallel single instruction multiple data stream (SIMD) processor designed specifically for cryptographic key search applications is presented. This design aims to ex...
Stanley Y. C. Li, Gap C. K. Cheuk, Kin-Hong Lee, P...