377 search results - page 22 / 76 » Multiple Instruction Stream Processor |
CHES
2009
Springer
14 years 8 months ago
2009
Springer
We demonstrate new techniques to speed up the Rijndael (AES) block cipher using vector permute instructions. Because these techniques avoid data- and key-dependent branches and mem...
HIPEAC
2009
Springer
14 years 2 months ago
2009
Springer
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...
DATE
2010
IEEE
14 years 23 days ago
2010
IEEE
Abstract—In conventional static implementations for correlated streaming applications, computing resources may be inefficiently utilized since multiple stream processors may sup...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
SASP
2008
IEEE
14 years 2 months ago
2008
IEEE
Abstract—Customised processor performance generally increases as additional custom instructions are added. However, performance is not the only metric that modern systems must ta...