377 search results - page 45 / 76 » Multiple Instruction Stream Processor |
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
EGH
2004
Springer
14 years 20 days ago
2004
Springer
Utilizing graphics hardware for general purpose numerical computations has become a topic of considerable interest. The implementation of streaming algorithms, typified by highly ...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
The physical register file is an important component of a dynamically-scheduled processor. Increasing the amount of parallelism places increasing demands on the physical register...
ICCD
2000
IEEE
2000
IEEE
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
14 years 1 months ago
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
CC
2008
Springer
13 years 11 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...