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ASAP
2008
IEEE
118views Hardware» more  ASAP 2008»
14 years 2 months ago
Bit matrix multiplication in commodity processors
Registers in processors generally contain words or, with the addition of multimedia extensions, short vectors of subwords of bytes or 16-bit elements. In this paper, we view the c...
Yedidya Hilewitz, Cédric Lauradoux, Ruby B....
ICMCS
2006
IEEE
152views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Muli-Issue Multi-Threaded Stream Processor
The MISP Processor is a programmable media processor which supports multi-issuing, multi-threading and stream processing techniques. MISP executes applications that have been mapp...
Somayeh Sardashti, Hamid Reza Ghasemi, Omid Fatemi
ARCS
1997
Springer
13 years 11 months ago
A RISC Processor with Extended Forwarding
The paper examines a simple conceptual modification of the operation unit of a RISC processor. We propose to substitute a part of the conventional general purpose register file by...
Gert Markwardt, Günter Kemnitz, Rainer G. Spa...
ISCA
2003
IEEE
96views Hardware» more  ISCA 2003»
14 years 28 days ago
Parallelism in the Front-End
As processor back-ends get more aggressive, front-ends will have to scale as well. Although the back-ends of superscalar processors have continued to become more parallel, the fro...
Paramjit S. Oberoi, Gurindar S. Sohi
RTCSA
2006
IEEE
14 years 1 months ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue