94 search results - page 15 / 19 » Multiple-banked register file architectures |
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
APPT
2009
Springer
14 years 2 months ago
2009
Springer
SIMD extension is one of the most common and effective technique to exploit data-level parallelism in today’s processor designs. However, the performance of SIMD architectures i...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Application-specific instruction-set extensions (custom instructions) help embedded processors achieve higher performance. Most custom instructions offering significant performanc...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
ASPLOS
2004
ACM
14 years 1 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...