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ICASSP
2011
IEEE
12 years 11 months ago
Reduced-hardware digital filter design via joint quantization and multiple constant multiplication optimization
The focus of this paper is to provide a framework for the joint optimization of both the coefficient quantization and multiple constant multiplication (MCM) problems. It is known...
Matthew B. Gately, Mark B. Yeary, Choon Yik Tang
GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
13 years 8 months ago
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
DAC
2004
ACM
14 years 9 months ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
James C. Hoe, Markus Püschel, Peter Tummeltsh...
IMECS
2007
13 years 9 months ago
A Common Subexpression Sharing Approach for Multiplierless Synthesis of Multiple Constant Multiplications
—In the context of multiple constant multiplications (MCM) design, we propose a novel common-subexpression-elimination (CSE) algorithm that models synthesis of coefficients into ...
Yuen-Hong Alvin Ho, Chi-Un Lei, Ngai Wong