We study integrated prefetching and caching problems following the work of Cao et. al. [3] and Kimbrel and Karlin [13]. Cao et. al. and Kimbrel and Karlin gave approximation algor...
Traditional minimum area retiming algorithms attempt to achieve their prescribed objective with no regard to maintaining the initial state of the system. This issue is important f...
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases. There exists some tools that give an o...
We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eciently evaluating switch module designs [8]...
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...