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» Network-on-Chip Architecture Exploration Framework
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CHI
2007
ACM
14 years 7 months ago
An extensible platform for the interactive exploration of Fitts' Law and related movement time models
This paper describes a new software platform for the interactive exploration of human performance models such as Fitts' law. The software is written in Java and provides a fl...
Martin J. Schedlbauer
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
14 years 23 days ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
14 years 27 days ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 4 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
MAM
2006
101views more  MAM 2006»
13 years 7 months ago
EPICURE: A partitioning and co-design framework for reconfigurable computing
This paper presents a new design methodology able to bridge the gap between an abstract specification and a heterogeneous recone architecture. The EPICURE contribution is the resu...
Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philip...