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116
Voted
DAC
2002
ACM
16 years 4 months ago
Solving difficult SAT instances in the presence of symmetry
Research in algorithms for Boolean satisfiability and their efficient implementations [26, 8] has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks fro...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
124
Voted
DAC
2003
ACM
16 years 4 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid
163
Voted
DAC
2004
ACM
16 years 4 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
119
Voted
DAC
2004
ACM
16 years 4 months ago
Statistical optimization of leakage power considering process variations using dual-Vth and sizing
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
Ashish Srivastava, Dennis Sylvester, David Blaauw
141
Voted
DAC
2004
ACM
16 years 4 months ago
An analytical approach for dynamic range estimation
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
Bin Wu, Jianwen Zhu, Farid N. Najm
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