—In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that c...
The phase detector is a main building block in phaselocked loop (PLL) applications. FPGAs permit the realtime implementation of the CORDIC algorithm which offers an efficient solu...
Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified app...
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
This paper is concerned with the problem of computing a discretecoefficient approximation to a digital filter. In contrast to earlier works that have approached this problem usi...
Subramanian Ramamoorthy, Lothar Wenzel, James Nagl...