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» NoC Power Estimation at the RTL Abstraction Level
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ISLPED
1998
ACM
95views Hardware» more  ISLPED 1998»
13 years 11 months ago
The petrol approach to high-level power estimation
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
Rafael Peset Llopis, Kees G. W. Goossens
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 1 months ago
High-level architecture exploration for MPEG4 encoder with custom parameters
Abstract - this paper proposes the use of a high-level architecture exploration method for different MPEG4 video encoders using different customization parameters. The targeted arc...
Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Yo...
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 1 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
DATE
2010
IEEE
202views Hardware» more  DATE 2010»
14 years 19 days ago
FlashPower: A detailed power model for NAND flash memory
Abstract— Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary stor...
Vidyabhushan Mohan, Sudhanva Gurumurthi, Mircea R....
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
13 years 12 months ago
A hybrid approach for core-based system-level power modeling
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
Tony Givargis, Frank Vahid, Jörg Henkel