Sciweavers

152 search results - page 21 / 31
» Noise considerations in circuit optimization
Sort
View
ISPD
2005
ACM
205views Hardware» more  ISPD 2005»
14 years 1 months ago
Coupling aware timing optimization and antenna avoidance in layer assignment
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
Di Wu, Jiang Hu, Rabi N. Mahapatra
BMCBI
2007
130views more  BMCBI 2007»
13 years 8 months ago
A model-based optimization framework for the inference of regulatory interactions using time-course DNA microarray expression da
Background: Proteins are the primary regulatory agents of transcription even though mRNA expression data alone, from systems like DNA microarrays, are widely used. In addition, th...
Reuben Thomas, Carlos J. Paredes, Sanjay Mehrotra,...
ICCAD
2006
IEEE
149views Hardware» more  ICCAD 2006»
14 years 1 months ago
Fast decap allocation based on algebraic multigrid
Decap (decoupling capacitor) is an effective technique for suppressing power supply noise. Nevertheless, over-usage of decap usually causes excessive power dissipation. Therefore...
Cheng Zhuo, Jiang Hu, Min Zhao, Kangsheng Chen
ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...