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VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
14 years 8 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
ICCD
2000
IEEE
137views Hardware» more  ICCD 2000»
14 years 25 days ago
Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
Alexandre Solomatnikov, Kaushik Roy, Cheng-Kok Koh...
DELTA
2004
IEEE
14 years 4 days ago
Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing
Abstract--As the supply voltage to a standard CMOS opamp is reduced, the input common mode range and the output swing get reduced drastically. Special biasing circuits have to be u...
S. V. Gopalaiah, A. P. Shivaprasad
DAC
2001
ACM
14 years 9 months ago
Dynamic Detection and Removal of Inactive Clauses in SAT with Application in Image Computation
In this paper, we present a new technique for the e cient dynamic detection and removal of inactive clauses, i.e. clauses that do not a ect the solutions of interest of a Boolean ...
Aarti Gupta, Anubhav Gupta, Zijiang Yang, Pranav A...
ISQED
2005
IEEE
64views Hardware» more  ISQED 2005»
14 years 2 months ago
Design of High Performance Sense Amplifier Using Independent Gate Control in sub-50nm Double-Gate MOSFET
Double-Gate (DG) transistor has emerged as the most promising device for nano-scale circuit design. Independent control of front and back gate in DG devices can be effectively use...
Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaush...