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» Noise-tolerant dynamic circuit design
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DAC
2003
ACM
14 years 10 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
14 years 3 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
14 years 3 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
FPL
2007
Springer
111views Hardware» more  FPL 2007»
14 years 3 months ago
Adaptive Thermoregulation for Applications on Reconfigurable Devices
A biological organism’s ability to sense and adapt to its environment is essential to its survival. Likewise, environmentally aware computing systems avail themselves to a longe...
Phillip H. Jones, James Moscola, Young H. Cho, Joh...
GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
14 years 3 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis