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» Non-gaussian statistical interconnect timing analysis
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DAC
2004
ACM
14 years 10 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
14 years 3 months ago
A one-shot projection method for interconnects with process variations
—With the development of IC technology, it becomes urgent to investigate model reduction method for interconnects with process variations. In this paper, a one-shot projection al...
Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong ...
GLVLSI
2006
IEEE
144views VLSI» more  GLVLSI 2006»
14 years 3 months ago
Crosstalk analysis in nanometer technologies
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
Shahin Nazarian, Ali Iranli, Massoud Pedram
DAC
2008
ACM
14 years 10 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
CCGRID
2008
IEEE
13 years 11 months ago
Using Probabilistic Characterization to Reduce Runtime Faults in HPC Systems
Abstract--The current trend in high performance computing is to aggregate ever larger numbers of processing and interconnection elements in order to achieve desired levels of compu...
Jim M. Brandt, Bert J. Debusschere, Ann C. Gentile...