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» Non-linear image processing in hardware
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DAC
1999
ACM
13 years 11 months ago
Dynamically Reconfigurable Architecture for Image Processor Applications
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Alexandro M. S. Adário, Eduardo L. Roehe, S...
ISCAS
2006
IEEE
105views Hardware» more  ISCAS 2006»
14 years 1 months ago
A CMOS contact imager for locating individual cells
— We describe the design of a contact imager for applications in lab-on-a-chip systems, such as sample preparation and manipulation and monitoring of cells. This is a challenging...
Honghao Ji, David Sander, A. Haas, Pamela Abshire
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
14 years 1 months ago
Image sensor with focal plane change event driven video compression
— An image sensor with focal plane based hardware acceleration of video compression is presented. The 90×90 pixel CMOS image sensor provides in-pixel processing of intensity cha...
Yu M. Chi, Ralph Etienne-Cummings, Gert Cauwenberg...
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
14 years 1 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...
DSD
2004
IEEE
122views Hardware» more  DSD 2004»
13 years 11 months ago
On the Packet-Switched Implementation of a Discrete-Time CNN
Cellular Neural Networks are widely used with real-time image processing's applications. Such systems can be efficiently realized using macro enriched fieldprogrammable gate-...
Suleyman Malki, Lambert Spaanenburg