Sciweavers

325 search results - page 61 / 65
» Non-uniform Instruction Scheduling
Sort
View
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
14 years 4 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
LCTRTS
2009
Springer
14 years 2 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 1 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
PIMRC
2008
IEEE
14 years 1 months ago
Active Highways (Position Paper)
—Highways are an essential component of our society because they are critical to quality of life and to local and national economies. Under good conditions, highways provide a sa...
Liviu Iftode, Stephen Smaldone, Mario Gerla, James...
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Sorting with Machine Learning Algorithms
The growing complexity of modern processors has made the development of highly efficient code increasingly difficult. Manually developing highly efficient code is usually expen...
Xiaoming Li, María Jesús Garzar&aacu...