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» Nonuniform Banking for Reducing Memory Energy Consumption
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CASES
2003
ACM
14 years 1 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
14 years 2 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
ICS
2005
Tsinghua U.
14 years 2 months ago
Low-power, low-complexity instruction issue using compiler assistance
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...
Madhavi Gopal Valluri, Lizy Kurian John, Kathryn S...
COMSUR
2011
196views Hardware» more  COMSUR 2011»
12 years 8 months ago
From MANET To IETF ROLL Standardization: A Paradigm Shift in WSN Routing Protocols
—In large networks, a data source may not reach the intended sink in a single hop, thereby requiring the traffic to be routed via multiple hops. An optimized choice of such rout...
Thomas Watteyne, Antonella Molinaro, Maria Grazia ...
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
14 years 3 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...