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» Novel CNTFET-based Reconfigurable Logic Gate Design
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ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 5 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
ARITH
2003
IEEE
14 years 1 months ago
On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge
In this paper we investigate the implementation of basic arithmetic functions, such as addition and multiplication, in Single Electron Tunneling (SET) technology. First, we descri...
Sorin Cotofana, Casper Lageweg, Stamatis Vassiliad...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 2 months ago
Enabling fine-grain leakage management by voltage anchor insertion
Functional unit shutdown based on MTCMOS devices is effective for leakage reduction in aggressively scaled technologies. However, the applicability of MTCMOS-based shutdown in a s...
Pietro Babighian, Luca Benini, Alberto Macii, Enri...
GECCO
2008
Springer
201views Optimization» more  GECCO 2008»
13 years 9 months ago
Advanced techniques for the creation and propagation of modules in cartesian genetic programming
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
Paul Kaufmann, Marco Platzner
TCAD
2002
115views more  TCAD 2002»
13 years 8 months ago
Analytical models for crosstalk excitation and propagation in VLSI circuits
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer