129 search results - page 3 / 26 » Novel Design Methodology for High-Performance XOR-XNOR Circu... |
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
GLVLSI
1998
IEEE
14 years 25 days ago
1998
IEEE
In this paper we introduce a VLSI priority encoder that uses a novel priority lookahead scheme to reduce the delay for the worse case operation of the circuit, while maintaining a...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
PACS
2000
Springer
14 years 4 days ago
2000
Springer
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...