The prospective use of upcoming nanometer CMOS technology nodes (65nm, 45nm, and beyond) in bioelectronic interfaces is raising a number of important issues concerning circuit arc...
Carlotta Guiducci, Alexandre Schmid, Frank K. G&uu...
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, ...
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...