322 search results - page 34 / 65 » On Design and Application Mapping of a Network-on-Chip(NoC) ... |
DAC
2010
ACM
13 years 11 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
ICSE
2001
IEEE-ACM
14 years 2 days ago
2001
IEEE-ACM
An emerging tapestry of computations will soon integrate systems around the globe. It will evolve without central control. Its complexity will be vast. We need new ideas, tools an...
FPGA
2009
ACM
13 years 5 months ago
2009
ACM
Multi-field packet classification is a key enabling function of a variety of network applications, such as firewall processing, Quality of Service differentiation, traffic billing...
DAC
2010
ACM
13 years 6 months ago
2010
ACM
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...