216 search results - page 11 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
EGH
2004
Springer
13 years 11 months ago
2004
Springer
Utilizing graphics hardware for general purpose numerical computations has become a topic of considerable interest. The implementation of streaming algorithms, typified by highly ...
MICRO
2003
IEEE
14 years 1 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
SIGMETRICS
2003
ACM
14 years 1 months ago
2003
ACM
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
CAL
2007
13 years 7 months ago
2007
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...