710 search results - page 31 / 142 » On Minimum Power Connectivity Problems |
ISCAS
1999
IEEE
13 years 12 months ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
CDC
2010
IEEE
12 years 11 months ago
2010
IEEE
— The problem of placing an arbitrary subset (m) of the (n) closed loop eigenvalues of a nth order continuous time single input linear time invariant(LTI) system, using full stat...
COCOA
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. The node-weighted Steiner tree problem is a variation of classical Steiner minimum tree problem. Given a graph G = (V, E) with node weight function C : V → R+ and a sub...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Given an n-vertex graph G, a drawing of G in the plane is a mapping of its vertices into points of the plane, and its edges into continuous curves, connecting the images of their ...