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» On Modeling Cross-Talk Faults
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DSN
2004
IEEE
14 years 17 days ago
The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rang...
EDCC
2008
Springer
13 years 10 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
CODES
2010
IEEE
13 years 5 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
AICCSA
2007
IEEE
120views Hardware» more  AICCSA 2007»
14 years 3 months ago
Using Maintainability Based Risk Assessment and Severity Analysis in Prioritizing Corrective Maintenance Tasks
:- A software product spends more than 65% of its lifecycle in maintenance. Software systems with good maintainability can be easily modified to fix faults. In this paper, we adapt...
Walid Abdelmoez, Katerina Goseva-Popstojanova, Han...
HPDC
2006
IEEE
14 years 2 months ago
Toward Self Organizing Grids
— The potential of truly large scale grids can only be realized with grid architectures and deployment strategies that lower the need for human administrative intervention, and t...
Nael B. Abu-Ghazaleh, Michael J. Lewis