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» On Modeling Cross-Talk Faults
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ICCAD
2008
IEEE
106views Hardware» more  ICCAD 2008»
14 years 5 months ago
Process variability-aware transient fault modeling and analysis
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marcul...
PRDC
2009
IEEE
14 years 3 months ago
Evaluating the Use of Reference Run Models in Fault Injection Analysis
—Fault injection (FI) has been shown to be an effective approach to assessing the dependability of software systems. To determine the impact of faults injected during FI, a given...
Matthew Leeke, Arshad Jhumka
DAC
2009
ACM
14 years 9 months ago
Fault models for embedded-DRAM macros
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first star...
Ching-Yu Chin, Hao-Yu Yang, Mango Chia-Tso Chao, R...
DATE
2007
IEEE
123views Hardware» more  DATE 2007»
14 years 3 months ago
Clock domain crossing fault model and coverage metric for validation of SoC design
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
Yi Feng 0002, Zheng Zhou, Dong Tong, Xu Cheng
UAI
1993
13 years 10 months ago
Diagnosis of Multiple Faults: A Sensitivity Analysis
We compare the diagnostic accuracy of three diagnostic inference models: the simple Bayes model, the multimembership Bayes model, which is isomorphic to the parallel combination f...
David Heckerman, Michael Shwe