In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
This paper describes a fast, automated technique for accurate on-line estimation of the performance and power consumption of interacting processes in a multi-programmed, multi-cor...
Xi Chen, Chi Xu, Robert P. Dick, Zhuoqing Morley M...
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
Safety Critical Java is a specification being built on top a subset of interfaces from the Real-Time Specification for Java. It is designed to ease development and analysis of s...