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» On Reconfigurable Co-processing Units
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ANCS
2005
ACM
14 years 1 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...
CF
2004
ACM
14 years 1 months ago
The happy marriage of architecture and application in next-generation reconfigurable systems
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
Ingrid Verbauwhede, Patrick Schaumont
MICRO
2000
IEEE
72views Hardware» more  MICRO 2000»
13 years 7 months ago
PipeRench implementation of the instruction path coprocessor
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John ...
ICCAD
2001
IEEE
101views Hardware» more  ICCAD 2001»
14 years 4 months ago
Instruction Generation for Hybrid Reconfigurable Systems
In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. ...
Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzad...
DARS
2000
Springer
140views Robotics» more  DARS 2000»
13 years 11 months ago
Micro Self-Reconfigurable Robotic System using Shape Memory Alloy
This paper presents micro self-reconfigurable modular robotic systems using shape memory alloy (SMA). The system is designed so that various shapes can be autonomously formed by a ...
Eiichi Yoshida, Satoshi Murata, Shigeru Kokaji, Ko...