Sciweavers

117 search results - page 4 / 24
» On Reconfigurable Co-processing Units
Sort
View
ASAP
2007
IEEE
203views Hardware» more  ASAP 2007»
13 years 11 months ago
Reconfigurable Universal Adder
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
Humberto Calderon, Georgi Gaydadjiev, Stamatis Vas...
MVA
1992
188views Computer Vision» more  MVA 1992»
13 years 9 months ago
The Programmable and Configurable Low Level Vision Unit of the HERMIA Machine
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
Gaetano Gerardi, Giancarlo Parodi
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
14 years 20 days ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
DATE
2007
IEEE
110views Hardware» more  DATE 2007»
14 years 2 months ago
Reconfigurable system-on-chip data processing units for space imaging instruments
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of trad...
Björn Fiethe, Harald Michalik, C. Dierker, Bj...
EUC
2006
Springer
13 years 11 months ago
Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...