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APCSAC
2003
IEEE
14 years 27 days ago
Reducing Access Count to Register-Files through Operand Reuse
This paper proposes an approach for reducing access count to register-files based on operand data reuse. The key idea is to compare source and destination operands of the current ...
Hiroshi Takamura, Koji Inoue, Vasily G. Moshnyaga
ICS
2003
Tsinghua U.
14 years 24 days ago
Reducing register ports using delayed write-back queues and operand pre-fetch
In high-performance wide-issue microprocessors the access time, energy and area of the register file are often critical to overall performance. This is because these pararmeters g...
Nam Sung Kim, Trevor N. Mudge
IPPS
2008
IEEE
14 years 2 months ago
Enhancing the effectiveness of utilizing an instruction register file
This paper describes the outcomes of the NSF Grant CNS-0615085: CSR-EHS: Enhancing the Effectiveness of Utilizing an Instruction Register File. We improved promoting instructions ...
David B. Whalley, Gary S. Tyson
ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
14 years 27 days ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
HPCA
2006
IEEE
14 years 8 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal