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» On Timing Analysis of Combinational Circuits
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DAC
2008
ACM
14 years 8 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
DATE
2007
IEEE
110views Hardware» more  DATE 2007»
14 years 1 months ago
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis
Abstract— Modern integrated radio systems require highly linear analog/RF circuits. Two-tone simulations are commonly used to study a circuit’s nonlinear behavior. Very often, ...
Jonathan Borremans, Ludwig De Locht, Piet Wambacq,...
ASYNC
1997
IEEE
103views Hardware» more  ASYNC 1997»
13 years 10 months ago
Efficient Timing Analysis Algorithms for Timed State Space Exploration
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
Wendy Belluomini, Chris J. Myers
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
13 years 10 months ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...
DAC
2007
ACM
14 years 8 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...