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» On hierarchical statistical static timing analysis
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DATE
2006
IEEE
158views Hardware» more  DATE 2006»
14 years 3 months ago
Modeling multiple input switching of CMOS gates in DSM technology using HDMR
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
Jayashree Sridharan, Tom Chen
ICSM
2007
IEEE
14 years 4 months ago
On the prediction of the evolution of libre software projects
Libre (free / open source) software development is a complex phenomenon. Many actors (core developers, casual contributors, bug reporters, patch submitters, users, etc.), in many ...
Israel Herraiz, Jesús M. González-Ba...
CONCURRENCY
2008
84views more  CONCURRENCY 2008»
13 years 10 months ago
Dynamic allocation in a self-scaling cluster database
Abstract. Database systems have been vital for all forms of data processing for a long time. In recent years, the amount of processed data has been growing dramatically, even in sm...
Tilmann Rabl, Marc Pfeffer, Harald Kosch
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
14 years 1 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
14 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah