Sciweavers

305 search results - page 58 / 61
» On modeling top-down VLSI design
Sort
View
VLSID
2010
IEEE
170views VLSI» more  VLSID 2010»
13 years 1 months ago
Novel Vth Hopping Techniques for Aggressive Runtime Leakage Contro
The continuous increase of leakage power consumption in deep sub-micro technologies necessitates more aggressive leakage control. Runtime leakage control (RTLC) is effective, si...
Hao Xu, Wen-Ben Jone, Ranga Vemuri
DAC
2007
ACM
14 years 8 months ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
VLSID
2001
IEEE
184views VLSI» more  VLSID 2001»
14 years 7 months ago
Battery Life Estimation of Mobile Embedded Systems
Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy d...
Debashis Panigrahi, Sujit Dey, Ramesh R. Rao, Kani...
IWCMC
2006
ACM
14 years 1 months ago
A heuristics based approach for cellular mobile network planning
Designing and planning of the switching, signaling and support network is a fairly complex process in cellular mobile network. In this paper, the problem of assigning cells to swi...
Marwan H. Abu-Amara, Sadiq M. Sait, Abdul Subhan
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 4 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li