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» On software design for stochastic processors
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ICCAD
1996
IEEE
106views Hardware» more  ICCAD 1996»
15 years 9 months ago
Heterogeneous built-in resiliency of application specific programmable processors
Abstract - Using the exibility provided by multiple functionalities we have developed a new approach for permanent fault-tolerance: Heterogeneous BuiltIn-Resiliency (HBIR). HBIR p...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
CC
2005
Springer
108views System Software» more  CC 2005»
15 years 11 months ago
Task Partitioning for Multi-core Network Processors
Abstract. Network processors (NPs) typically contain multiple concurrent processing cores. State-of-the-art programming techniques for NPs are invariably low-level, requiring progr...
Robert Ennals, Richard Sharp, Alan Mycroft
LCPC
2005
Springer
15 years 11 months ago
Compiler Supports and Optimizations for PAC VLIW DSP Processors
Abstract. Compiler is substantially regarded as the most essential component in the software toolchain to promote a successful processor design. This paper describes our preliminar...
Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Y...
ASPLOS
2006
ACM
15 years 11 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
IPPS
1998
IEEE
15 years 9 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf