1795 search results - page 126 / 359 » On the Complexity of Circuit Satisfiability |
ISQED
2007
IEEE
14 years 3 months ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
ISCAS
2005
IEEE
14 years 2 months ago
2005
IEEE
Abstract— Interconnect has become a primary bottleneck in integrated circuit design. As CMOS technology is scaled, it will become increasingly difficult for conventional copper ...
CHES
2005
Springer
14 years 2 months ago
2005
Springer
During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...