In this paper, we make two major contributions: First, to enhance Boolean learning, we propose a new class of logic implications called extended forward implications. Using a nove...
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Recent work showed that staging and abstract interpretation can be used to derive correct families of combinatorial circuits, and illustrated this technique with an in-depth analys...
Motivated by very/ultra large scale integrated circuit (VLSI/ULSI) physical design applications, we study the construction of rectilinear minimum spanning tree (RMST) with its maxi...
Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xia...
—Bug-free first silicon is not guaranteed by the existing pre-silicon verification techniques. To have impeccable products, it is now required to identify any bug as soon as the ...