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» On the Complexity of Register Coalescing
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FPGA
1997
ACM
118views FPGA» more  FPGA 1997»
13 years 11 months ago
Module Generation of Complex Macros for Logic-Emulation Applications
Logic emulation is a technique that uses dynamically reprogrammable systems for prototyping and design veri cation. Using an emulator, designers can realize designs through a soft...
Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
SYNASC
2005
IEEE
86views Algorithms» more  SYNASC 2005»
14 years 1 months ago
One and Two Polarizations, Membrane Creation and Objects Complexity in P Systems
We improve, by using register machines, some existing universality results for specific models of P systems. P systems with membrane creation are known to generate all recursivel...
Artiom Alhazov, Rudolf Freund, Agustin Riscos-N&ua...
MICRO
2003
IEEE
108views Hardware» more  MICRO 2003»
14 years 25 days ago
Reducing Design Complexity of the Load/Store Queue
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar
TVLSI
2002
102views more  TVLSI 2002»
13 years 7 months ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 2 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...