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» On the Complexity of Register Coalescing
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ISLPED
1998
ACM
83views Hardware» more  ISLPED 1998»
13 years 11 months ago
A three-port adiabatic register file suitable for embedded applications
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs...
Stephan Avery, Marwan A. Jabri
EUC
2006
Springer
13 years 11 months ago
Saving Register-File Leakage Power by Monitoring Instruction Sequence in ROB
- Modern portable or embedded systems support more and more complex applications. These applications make embedded devices require not only low powerconsumption, but also high comp...
Wann-Yun Shieh, Hsin-Dar Chen
BMCBI
2007
172views more  BMCBI 2007»
13 years 7 months ago
msBayes: Pipeline for testing comparative phylogeographic histories using hierarchical approximate Bayesian computation
Background: Although testing for simultaneous divergence (vicariance) across different population-pairs that span the same barrier to gene flow is of central importance to evoluti...
Michael J. Hickerson, Eli Stahl, Naoki Takebayashi
EUROCAST
2005
Springer
166views Hardware» more  EUROCAST 2005»
14 years 1 months ago
A New Pseudo-Random Generator Based on Gollmann Cascades of Baker-Register-Machines
In this paper, we present a new pseudo-random sequence generator, constructed by the generalized discrete Baker transformation. This new generator is called Cascaded Baker Register...
Dominik Jochinger, Franz Pichler
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu