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JCSC
2002
129views more  JCSC 2002»
13 years 7 months ago
Leakage Current Reduction in VLSI Systems
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...
DAC
1997
ACM
13 years 11 months ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
ISLPED
1996
ACM
69views Hardware» more  ISLPED 1996»
13 years 11 months ago
Substrate noise influence on circuit performance in variable threshold-voltage scheme
- This paper investigates substrate noise influence on circuit performance in a variable thresholdvoltage scheme (VT scheme) where threshold voltage is dynamically varied by substr...
Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Tosh...
DAC
2005
ACM
14 years 8 months ago
A novel synthesis approach for active leakage power reduction using dynamic supply gating
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
Swarup Bhunia, Nilanjan Banerjee, Qikai Chen, Hami...